A combinatorial approximation algorithm for selecting the gate sizes from finite sets in VLSI circuits / Nodari Vakhania; Frank Werner

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cbs.date.changed2021-09-04
cbs.date.creation2013-03-13
cbs.picatypeOa
cbs.publication.displayform[Magdeburg] : [Univ., Fak. für Mathematik], 2011
dc.contributor.authorVakhania, Nodari
dc.contributor.authorWerner, Frank
dc.date.accessioned2025-05-28T21:30:30Z
dc.date.issued2011
dc.description.noteSchriftenreihe ermittelt
dc.description.noteText in engl.
dc.format.extentOnline-Ressource (PDF-Datei: 14 S., 0,2 MB)
dc.genrebook
dc.identifier.ppn738175889
dc.identifier.urihttps://epflicht.bibliothek.uni-halle.de/handle/123456789/2852
dc.identifier.urnurn:nbn:de:gbv:3:2-52595
dc.identifier.vl-id2385507
dc.language.isoeng
dc.publisher[Univ., Fak. für Mathematik]
dc.relation.ispartofseriesPreprints ; 2011,36 ppn:622944983
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/
dc.subject.ddc510
dc.titleA combinatorial approximation algorithm for selecting the gate sizes from finite sets in VLSI circuits / Nodari Vakhania; Frank Werner
dc.typeBook
dspace.entity.typeMonograph
local.accessrights.itemAnonymous
local.openaccesstrue

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A combinatorial approximation algorithm for selecting the gate sizes from finite sets in VLSI circuits
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